#include "bsp.h"


#if defined (PLATFORM_ZYNQMP) || defined (PLATFORM_ZYNQ)
	#define UART_BASEADDR XPAR_XUARTPS_0_BASEADDR
#else
	#define UART_BASEADDR XPAR_UARTLITE_0_BASEADDR
#endif // PLATFORM_ZYNQMP || PLATFORM_ZYNQ


u32 ret32;
u8 ret8;
u8 UserInput;
u8 cerrent_ch;
u8 lock_status = 0;
u8 reconfig_flag_0 = 0;
u8 clear_flag_0 = 0;
u8 reconfig_flag_1 = 0;
u8 clear_flag_1 = 0;

void app_info(void)
{
	xil_printf("----------------------\r\n");
	xil_printf("\r\n%s, UTC %s\r\n",__DATE__,__TIME__);
	xil_printf("----------------------\r\n");
	print("input :\n\r");
	xil_printf("d - detect info\r\n");
	xil_printf("c - clear screen\r\n");
	xil_printf("f - detect port info\r\n");
#ifdef XPAR_XAXIS_SWITCH_NUM_INSTANCES
	xil_printf("s - switch video source\r\n");
#endif
	xil_printf("----------------------\r\n");
	xil_printf("\r\n");
}

void video_resolution_print(char *info,u32 baseaddr)
{
	xil_printf("-%s freq: %d -\r\n", info, Xil_In32(baseaddr + 0x8));
	xil_printf("-%s res: %dx%d -\r\n", info, Xil_In32(baseaddr + 0x0), Xil_In32(baseaddr + 0x4));
}



u8 uart_RecvByte(UINTPTR BaseAddress)
{
#if defined (PLATFORM_ZYNQMP) || defined (PLATFORM_ZYNQ)
	return XUartPs_RecvByte(BaseAddress);
#else
	return XUartLite_RecvByte(BaseAddress);
#endif // PLATFORM_ZYNQMP || PLATFORM_ZYNQ

}


void uart_receive_process(void)
{

#if defined (PLATFORM_ZYNQMP) || defined (PLATFORM_ZYNQ)
	while(XUartPs_IsReceiveData(UART_BASEADDR))
	{
#else
	if (!XUartLite_IsReceiveEmpty(UART_BASEADDR))
	{
#endif // PLATFORM_ZYNQMP || PLATFORM_ZYNQ

		// Read data from uart
		UserInput = uart_RecvByte(UART_BASEADDR);
		if((UserInput == 'm') || (UserInput == 'M'))
		{
			app_info();
		}
		else if((UserInput == 'd') || (UserInput == 'D'))
		{

			xil_printf("\r\n!!!!!!!!!!!!!!!!!!!!!\r\n");
			xil_printf("------------------------\r\n");

			video_resolution_print("port1_output",XPAR_AXIS_PASSTHROUGH_MON_PORT_0_S00_AXI_BASEADDR);
			video_resolution_print("port2_output",XPAR_AXIS_PASSTHROUGH_MON_PORT_1_S00_AXI_BASEADDR);
			video_resolution_print("port3_output",XPAR_AXIS_PASSTHROUGH_MON_PORT_2_S00_AXI_BASEADDR);
			video_resolution_print("port4_output",XPAR_AXIS_PASSTHROUGH_MON_PORT_3_S00_AXI_BASEADDR);


//			video_resolution_print("vc0_output",XPAR_YUV_OSD_AXIS_PASSTHROUGH_MON_VC0_S00_AXI_BASEADDR);
//			video_resolution_print("vc1_output",XPAR_YUV_OSD_AXIS_PASSTHROUGH_MON_VC1_S00_AXI_BASEADDR);
//			video_resolution_print("vc2_output",XPAR_YUV_OSD_AXIS_PASSTHROUGH_MON_VC2_S00_AXI_BASEADDR);
//			video_resolution_print("vc3_output",XPAR_YUV_OSD_AXIS_PASSTHROUGH_MON_VC3_S00_AXI_BASEADDR);

//			video_resolution_print("raw_osd_output",XPAR_RAW_OSD_AXIS_PASSTHROUGH_MON_0_S00_AXI_BASEADDR);
			video_resolution_print("yuv_osd_output",XPAR_YUV_OSD_AXIS_PASSTHROUGH_MON_0_S00_AXI_BASEADDR);
			video_resolution_print("vdma_in",XPAR_AXIS_PASSTHROUGH_MON_OSD_S00_AXI_BASEADDR);
			video_resolution_print("video_out",XPAR_VIDEO_OUT_AXIS_PASSTHROUGH_MON_0_S00_AXI_BASEADDR);

			xil_printf("------------------------\r\n");
		}
		else if((UserInput == 'k') || (UserInput == 'K'))
		{

			xil_printf("------------test RELAY_CUTOFF------------\r\n");
			usleep(100*1000);
			XGpioPs_WritePin(&Gpio, RELAY_CUTOFF, 1) ; // RELAY_CUTOFF: 0-keep; 1-cutoff
		}
		else if(UserInput == 'c')
		{
			xil_printf("------------clear display------------\r\n");
			clear_vdma_0();
		}
		else if(UserInput == 'z')
		{
			xil_printf("------------reconfig p4------------\r\n");
			ret32 = xgpio_i2c_reg16_write(I2C_NO_4, 0x90 >> 1, 0x0001, 0x02, STRETCH_ON); // 6Gbps
			ret32 = xgpio_i2c_reg16_write(I2C_NO_4, 0x90 >> 1, 0x0010, 0x21, STRETCH_ON); // reset link
			serdes_i2c_write_array_16(I2C_NO_4,cfg_gmsl_raw12);

		}

		else if(UserInput == 'x')
		{
			xil_printf("------------reconfig 717------------\r\n");
			serdes_i2c_write_array_16(I2C_NO_4,max96717_raw12_gmsl2);

		}
		else if(UserInput == 'a')
		{
			xil_printf("------------csi mipi info------------\r\n");
#if 1
xil_printf("(0x00)Core Configuration Register     = 0x00000001--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0x0));
xil_printf("(0x04)Protocol Configuration Register = 0x00000009--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0x04));
xil_printf("(0x10)Core Status Register            = 0x5C8C0000--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0x10));
xil_printf("(0x20)Global Interrupt Enable Register= 0x00000000--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0x20));
xil_printf("(0x24)Interrupt Status Register       = 0x80020000--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0x24));
xil_printf("(0x28)Interrupt Enable Register       = 0x00000000--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0x28));
xil_printf("(0x30)Generic Short Packet Register   = 0x00000000--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0x30));
xil_printf("(0x34)VCX Frame Error Register        = 0x00000000--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0x34));
xil_printf("(0x3C)Clock Lane Information Register = 0x00000000--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0x3C));
xil_printf("(0x40)Lane0 Information               = 0x00000020--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0x40));
xil_printf("(0x44)Lane1 Information               = 0x00000000--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0x44));
xil_printf("(0x48)Lane2 Information               = 0x00000000--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0x48));
xil_printf("(0x4C)Lane3 Information               = 0x00000000--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0x4C));
xil_printf("(0x60)Image Information 1 for VC0     = 0x5F830640--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0x60));
xil_printf("(0x64)Image Information 2 for VC0     = 0x0000002B--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0x64));
xil_printf("(0x68)Image Information 1 for VC1     = 0x00000000--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0x68));
xil_printf("(0x6C)Image Information 2 for VC1     = 0x00000000--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0x6C));
xil_printf("(0x70)Image Information 1 for VC2     = 0x00000000--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0x70));
xil_printf("(0x74)Image Information 2 for VC2     = 0x00000000--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0x74));
xil_printf("(0x78)Image Information 1 for VC3     = 0x00000000--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0x78));
xil_printf("(0x7C)Image Information 2 for VC3     = 0x00000000--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0x7C));
xil_printf("(0x80)Image Information 1 for VC4     = 0x00000000--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0x80));
xil_printf("(0x84)Image Information 2 for VC4     = 0x00000000--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0x84));
xil_printf("(0x88)Image Information 1 for VC5     = 0x00000000--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0x88));
xil_printf("(0x8C)Image Information 2 for VC5     = 0x00000000--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0x8C));
xil_printf("(0x90)Image Information 1 for VC6     = 0x00000000--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0x90));
xil_printf("(0x94)Image Information 2 for VC6     = 0x00000000--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0x94));
xil_printf("(0x98)Image Information 1 for VC7     = 0x00000000--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0x98));
xil_printf("(0x9C)Image Information 2 for VC7     = 0x00000000--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0x9C));
xil_printf("(0xA0)Image Information 1 for VC8     = 0x00000000--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0xA0));
xil_printf("(0xA4)Image Information 2 for VC8     = 0x00000000--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0xA4));
xil_printf("(0xA8)Image Information 1 for VC9     = 0x00000000--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0xA8));
xil_printf("(0xAC)Image Information 2 for VC9     = 0x00000000--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0xAC));
xil_printf("(0xB0)Image Information 1 for VC10    = 0x00000000--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0xB0));
xil_printf("(0xB4)Image Information 2 for VC10    = 0x00000000--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0xB4));
xil_printf("(0xB8)Image Information 1 for VC11    = 0x00000000--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0xB8));
xil_printf("(0xBC)Image Information 2 for VC11    = 0x00000000--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0xBC));
xil_printf("(0xC0)Image Information 1 for VC12    = 0x00000000--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0xC0));
xil_printf("(0xC4)Image Information 2 for VC12    = 0x00000000--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0xC4));
xil_printf("(0xC8)Image Information 1 for VC13    = 0x00000000--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0xC8));
xil_printf("(0xCC)Image Information 2 for VC13    = 0x00000000--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0xCC));
xil_printf("(0xD0)Image Information 1 for VC14    = 0x00000000--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0xD0));
xil_printf("(0xD4)Image Information 2 for VC14    = 0x00000000--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0xD4));
xil_printf("(0xD8)Image Information 1 for VC15    = 0x00000000--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0xD8));
xil_printf("(0xDC)Image Information 2 for VC15    = 0x00000000--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0xDC));

xil_printf("(0x00)D-PHY CONTROL           = 0x00000002--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0x1000+0x00));
xil_printf("(0x04)D-PHY IDELAY_TAP_VALUE  = 0x00000000--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0x1000+0x04));
xil_printf("(0x08)D-PHY INIT              = 0x000186A0--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0x1000+0x08));
xil_printf("(0x10)D-PHY HS_TIMEOUT        = 0x00000000--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0x1000+0x10));
xil_printf("(0x14)D-PHY ESC_TIMEOUT       = 0x00000000--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0x1000+0x14));
xil_printf("(0x18)D-PHY CL_STATUS         = 0x00000009--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0x1000+0x18));
xil_printf("(0x1C)D-PHY DL0_STATUS        = 0x69E60009--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0x1000+0x1C));
xil_printf("(0x20)D-PHY DL1_STATUS        = 0x6A4F0009--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0x1000+0x20));
xil_printf("(0x24)D-PHY DL2_STATUS        = 0x00000008--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0x1000+0x24));
xil_printf("(0x28)D-PHY DL3_STATUS        = 0x00000008--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0x1000+0x28));
xil_printf("(0x30)D-PHY HS_SETTLE L0      = 0x00000091--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0x1000+0x30));
xil_printf("(0x48)D-PHY HS_SETTLE L1      = 0x00000091--actualy register data = 0x%08x\r\n", Xil_In32(XPAR_CSISS_0_BASEADDR+0x1000+0x48));
#endif
		}
		else if((UserInput == 'f') || (UserInput == 'F'))
		{
			xil_printf("------------choose port(1~4)------------\r\n");
			UserInput = uart_RecvByte(UART_BASEADDR);
			if(UserInput >= '1' && UserInput <= '4' )
			{
				cerrent_ch = UserInput - '0';
				xil_printf("------------detect port %d info------------\r\n",cerrent_ch);
				ret8 = 0;
				xil_printf("***********9296***********\r\n");
				xil_printf("***link lock [3]***\r\n");
				xgpio_i2c_reg16_read(cerrent_ch, 0x90>>1, 0x0013, &ret8, STRETCH_ON);
				xil_printf("0x0013 == 0x%02x\r\n", ret8);
				xil_printf("***Video pipeline lock [6]***\r\n");
				xgpio_i2c_reg16_read(cerrent_ch, 0x90>>1, 0x0108, &ret8, STRETCH_ON);
				xil_printf("0x0108 == 0x%02x\r\n", ret8);
				xgpio_i2c_reg16_read(cerrent_ch, 0x90>>1, 0x011A, &ret8, STRETCH_ON);
				xil_printf("0x011A == 0x%02x\r\n", ret8);
				xgpio_i2c_reg16_read(cerrent_ch, 0x90>>1, 0x012C, &ret8, STRETCH_ON);
				xil_printf("0x012C == 0x%02x\r\n", ret8);
				xgpio_i2c_reg16_read(cerrent_ch, 0x90>>1, 0x013E, &ret8, STRETCH_ON);
				xil_printf("0x013E == 0x%02x\r\n", ret8);
				xil_printf("***video lock [0]***\r\n");
				xgpio_i2c_reg16_read(cerrent_ch, 0x90>>1, 0x01DC, &ret8, STRETCH_ON);
				xil_printf("0x01DC == 0x%02x\r\n", ret8);
				xgpio_i2c_reg16_read(cerrent_ch, 0x90>>1, 0x01FC, &ret8, STRETCH_ON);
				xil_printf("0x01FC == 0x%02x\r\n", ret8);
				xgpio_i2c_reg16_read(cerrent_ch, 0x90>>1, 0x021C, &ret8, STRETCH_ON);
				xil_printf("0x021C == 0x%02x\r\n", ret8);
				xgpio_i2c_reg16_read(cerrent_ch, 0x90>>1, 0x023C, &ret8, STRETCH_ON);
				xil_printf("0x023C == 0x%02x\r\n", ret8);


				xil_printf("***********717***********\r\n");
				xgpio_i2c_reg16_read(cerrent_ch, 0x80>>1, 0x0102, &ret8, STRETCH_ON);
				xil_printf("0x0102 == 0x%02x\r\n", ret8);
				xgpio_i2c_reg16_read(cerrent_ch, 0x80>>1, 0x010A, &ret8, STRETCH_ON);
				xil_printf("0x010A == 0x%02x\r\n", ret8);
				xgpio_i2c_reg16_read(cerrent_ch, 0x80>>1, 0x0112, &ret8, STRETCH_ON);
				xil_printf("0x0112 == 0x%02x\r\n", ret8);
				xgpio_i2c_reg16_read(cerrent_ch, 0x80>>1, 0x011A, &ret8, STRETCH_ON);
				xil_printf("0x011A == 0x%02x\r\n", ret8);
				xil_printf("------------------------\r\n");
			}
			else
			{
				xil_printf("------------cmd error----------\r\n");
			}

		}


		else if((UserInput == 's') || (UserInput == 'S'))
		{
#if XPAR_XAXIS_SWITCH_NUM_INSTANCES
			xil_printf("switch video source\r\n");
			UserInput = uart_RecvByte(UART_BASEADDR);

			xil_printf("------------------------\r\n");
			if(UserInput == '1')
			{
				AxisSwitch(XPAR_AXIS_SWITCH_0_DEVICE_ID, &AxisSwitch0, 0, 0); //stream
				xil_printf("------------switch to channel 1-----------\r\n");
			}
			else if(UserInput == '2')
			{
			    AxisSwitch(XPAR_AXIS_SWITCH_0_DEVICE_ID, &AxisSwitch0, 1, 0); //TPG
			    xil_printf("------------switch to channel 2-----------\r\n");
			}
			else if(UserInput == '3')
			{
			    AxisSwitch(XPAR_AXIS_SWITCH_0_DEVICE_ID, &AxisSwitch0, 2, 0); //TPG
			    xil_printf("------------switch to channel 3-----------\r\n");
			}
			else
			{
				xil_printf("\r input data error \n!!!!!!!!!!!!!");
			}

			xil_printf("------------------------\r\n");
#endif
		}

/****************************************************************************/
/****************************************************************************/
	}

}



void display_fresh(void)
{
	if(timer_cnt >= 1)//200ms
	{
		timer_cnt = 0;

	}

}


